From morris at ece.msstate.edu Wed Apr 6 09:58:05 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Wed Apr 6 09:58:10 2011 Subject: [ece4743] Project Description Message-ID: <01d401cbf46b$0477a8e0$0d66faa0$@msstate.edu> Skipped content of type multipart/alternative-------------- next part -------------- A non-text attachment was scrubbed... Name: hpfilter_project.zip Type: application/x-zip-compressed Size: 908548 bytes Desc: not available Url : http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110406/67b83705/hpfilter_project-0001.bin From morris at ece.msstate.edu Tue Apr 12 15:51:16 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Tue Apr 12 15:51:21 2011 Subject: [ece4743] RE: Project Question In-Reply-To: References: Message-ID: <018601cbf953$5cd3d760$167b8620$@msstate.edu> I did talk about it on Monday. I hope this helps. To get the final y(n) you need to round the 32-bit version of y(n) (yn_q31) and then trim off the least significant 16 bits. Something like this. temp[31:0] = yn_q31 + 0x0000_8000 yn[15:0] = temp[31:16]; Rounding in decimal goes something like this. If you want to round to the one's place you can add 0.5 then trim off all numbers to the right of the decimal point. Example. Round 1.6 to the one's place. We all know the answer is 2. Following the above rule: temp = 1.6 + 0.5 = 2.1 trim off bits to right of decimal -> result = 2 If you want to round to the ten's place you can add 5 them zero all digits to the right of the ten's place. Example. Round 13 to the ten's place. We all know the answer is 10. Following the above rule: temp = 13 + 5 = 18 zero digits to right of ten's place -> result = 10 If you want to round to 0.1 place you can add 0.05 them trim off all numbers to the right of the 0.1 place. Example. Round 4.25 to the nearest tenth. We all know the answer is 4.3. Following the above rule: temp = 4.25 + 0.05 = 4.3 zero digits to right of tenth's location -> result = 4.3 We always add half of the value of the location we are rounding to. It works the same in binary and hex. For the project, we are rounding to the 15th bit past the decimal which has precision of 2^(-15). We want to round into that location. Adding 0x0000_8000 adds half of 2^(-15) (which is 2^(-16)) to yn_q31. Then trimming completes the rounding. When the decimal point is in a fixed location trimming digits from the right of the decimal point and setting them to zero have the same effect. In other words 0.1 (Base 2) 0.10 (Base 2) Are the same number -> 0.5 decimal. Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 From: Cody Tankersley [mailto:clt140@msstate.edu] Sent: Tuesday, April 12, 2011 3:30 PM To: morris@ece.msstate.edu Subject: Project Question Dr. Morris, I was working with the first bit of the project and had a quick question. I seem to recall you mentioning that equation 5(the equation we are supposed to base part 1 on) is missing an addition. Could you elaborate? If you talked about this in class on Monday, I apologize for asking again. Thanks! Cody -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110412/d52b79df/attachment.html From morris at ece.msstate.edu Wed Apr 13 13:51:18 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Wed Apr 13 13:51:21 2011 Subject: [ece4743] RE: Questions about the project In-Reply-To: References: Message-ID: <02c801cbfa0b$c4d41a10$4e7c4e30$@msstate.edu> You are right that "N10 needs to be in R3 in order to add the rounding value". But, you should not put the rounding result into R3. You actually don't need to put the rounded result anywhere. The data path trims the sum signal and calls it "yn" for you. Just make sure that when your FSM is in the init state and waiting to start on another sample that mux_a1.s=1 and mux_a2.s=1. This way during the idle time (when done is asserted) yn will be correct and steady. This last part cannot shown on a schedule table. It has to do with the default values for your FSM outputs. Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 From: Lakeldren Williams [mailto:lnw40@msstate.edu] Sent: Wednesday, April 13, 2011 12:59 PM To: Tommy Morris Subject: Questions about the project Dr. Morris, This is what we've done so far on the project parts due today. After you talked to Melissa this morning we made changes. The attachment has two schedule charts. You will notice the yellow on the sections we are confused about. The first one is assuming that we put the sum of N8 and N9 which is N10 into R6. The second one is assuming we put N10 into R3. We believe that the second one is accurate because we think that N10 needs to be in R3 in order to add the rounding value which is N11 and then that value is loading back into R3. We assumed this based on the muxes mux_a1 and mux_a2 which need to both be 1 in order to do the round. I hope this doesn't confuse you but if so please let me know. I came by your office and you were not there. Thanks for your help, Lakeldren -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110413/8004fe55/attachment-0001.html From morris at ece.msstate.edu Sun Apr 17 13:29:51 2011 From: morris at ece.msstate.edu (morris@ece.msstate.edu) Date: Sun Apr 17 13:29:57 2011 Subject: [ece4743] Re: ASM Question In-Reply-To: <003e01cbfd21$923fe480$b6bfad80$@msstate.edu> References: <003e01cbfd21$923fe480$b6bfad80$@msstate.edu> Message-ID: <5F85E2BD-103D-458A-9FCF-70885FCEFF4D@ece.msstate.edu> A legend will work. Good idea. Thanks. Tommy Morris On Apr 17, 2011, at 12:05 PM, "Cody Tankersley" wrote: > Dr. Morris, > > > > I was working on my ASM, and I was wondering if I could create something like a legend, that list defaults (15 in total). > > > > I?m not sure if that is acceptable or not, but it seems a bit cluttered to list 15 defaults in every state. > > > > Thanks, > > Cody -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110417/1993f48b/attachment.html From morris at ece.msstate.edu Sun Apr 17 20:50:57 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Sun Apr 17 20:51:04 2011 Subject: [ece4743] RE: ASM Question In-Reply-To: <007701cbfd2f$74273d50$5c75b7f0$@msstate.edu> References: <003e01cbfd21$923fe480$b6bfad80$@msstate.edu> <5F85E2BD-103D-458A-9FCF-70885FCEFF4D@ece.msstate.edu> <007701cbfd2f$74273d50$5c75b7f0$@msstate.edu> Message-ID: <008101cbfd6b$0c94afb0$25be0f10$@msstate.edu> Skipped content of type multipart/alternative-------------- next part -------------- A non-text attachment was scrubbed... Name: isim.log Type: application/octet-stream Size: 74444 bytes Desc: not available Url : http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110417/43a410ee/isim-0001.obj From morris at ece.msstate.edu Mon Apr 18 09:43:09 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Mon Apr 18 09:43:13 2011 Subject: [ece4743] Project Checkoff Message-ID: <000d01cbfdd6$ef8d13a0$cea73ae0$@msstate.edu> Students, please select a time from the following list of time for project check off on April 21. Please email me 3 choice listed in order of preference (first is most preferred). 8:20- 8:40- 9:00- 9:20- 9:40- 10:00- 10:20- 10:40- 1:00- 1:20- 1:40- 4:00- 4:20- 4:40- Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110418/47d213c5/attachment.html From morris at ece.msstate.edu Mon Apr 18 11:21:25 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Mon Apr 18 11:21:28 2011 Subject: [ece4743] RE: Project Checkoff Message-ID: <004801cbfde4$a9526030$fbf72090$@msstate.edu> Students, I have posted your check-off times on the class website. See below link: https://sites.google.com/site/msuece47436743/#TOC-Class-Project Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 From: Tommy Morris [mailto:morris@ece.msstate.edu] Sent: Monday, April 18, 2011 9:43 AM To: 'ece4743@ece.msstate.edu' Subject: Project Checkoff Students, please select a time from the following list of time for project check off on April 21. Please email me 3 choice listed in order of preference (first is most preferred). 8:20- 8:40- 9:00- 9:20- 9:40- 10:00- 10:20- 10:40- 1:00- 1:20- 1:40- 4:00- 4:20- 4:40- Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110418/4f838c31/attachment.html From morris at ece.msstate.edu Mon Apr 18 11:31:02 2011 From: morris at ece.msstate.edu (Tommy Morris) Date: Mon Apr 18 11:31:12 2011 Subject: [ece4743] Final Exam Review Message-ID: <005a01cbfde6$0181cba0$048562e0$@msstate.edu> Students, I made a short video to review the final exam. It is 10 minutes long and covers topics to expect. Available on class website on the list of lecture slides. It is the last item in the list. Also available here: http://www.ece.msstate.edu/courses/ece4743/spr2011/finalreview_sper2011.mp 4 Thanks, Tommy Morris, PhD Assistant Professor Electrical and Computer Engineering Mississippi State University 233 Simrall Hall - (662)325-3199 -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110418/54d78d9a/attachment.html From morris at ece.msstate.edu Tue Apr 19 20:37:31 2011 From: morris at ece.msstate.edu (morris@ece.msstate.edu) Date: Tue Apr 19 20:37:35 2011 Subject: [ece4743] Re: Implementation Tech Slides In-Reply-To: <001b01cbfef8$141a8d20$3c4fa760$@msstate.edu> References: <001b01cbfef8$141a8d20$3c4fa760$@msstate.edu> Message-ID: Company A would be full custom. The key there is the have money and want performance(fastest). They can use there money to hand pack logic to get the fastest possible circuit. Company B would use an FPGA. The key word there is prototype. FPGA is a great prototype tech because the design time is so short. Plus not having much money means they might not be able to afford the non recurring engineering (NRE) costs associated with making reticles which is required for the other three techs. NRE for reticles coat several million dollars. Companies won't pay it unless they confident they are going to sell lots of chips to amortize that expense. Also, lots of semiconductor companies don't want to take the risk of making a custom chip for a startup. Too much risk. Company C is standard cell. Full custom cost much more than standard cell and the extra design work takes considerable extra time and money. Company C can get a fairly cheap product (high volume eg. "lots of them") is a clue for standard cell or full custom. Saving time and dollars tips the balance to standard cell. Plus full custom requires VLSI designers to layout transistors(a task Verilog coders typically aren't trained to do). Tommy Morris On Apr 19, 2011, at 8:13 PM, "Cody Tankersley" wrote: > Dr. Morris, > > > > Your last slide lists 3 design questions. > > > > Could you provide your answers for that? Perhaps a brief explanation for why? > > > > For example, in C, they are low on cash, no expert, and want to beat company A. > > > > I would think A would do a full custom, and most of C points to standard cell; however, beating A to the market might be hard with that route. Is design time the differentiating factor here? > > > > Thanks, > > Cody -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.ece.msstate.edu/pipermail/ece4743/attachments/20110419/410993f8/attachment.html