3 Randos
From Ece
1. Team Name and Members
- Team Name: 3 Randos
- Team Leader: Matt Ritter
- Co-Team Leader: Ross Keenum
- Co-Team Leader: Josh White
2. Design Overview
The project is based on the design and simulation of a 16-bit MIPS RISC processor. The simulation of this processor will be built out of C++ source code with the ability to execute fifteen instructions. We will use the falling edge triggered as our clocking methodology. For our registers file, there will be 16 registers included; each register in the file is 16-bits wide.
- Meetings and Updates
Tuesday October 25, 2011 - Begin Work On Proposal 6-9 pm. All 3 Attended.
Wednesday October 26, 2011 - Finalize Proposal 6-10 pm. All 3 Attended.
Monday November 14, 2011- Design and update Web Page. Discuss initial datapath, schematic for datapath, and coding for the muxes, ALU, and control. 6-10 pm. All 3 Attended.
Thursday November 17, 2011- Test schematic diagram, started hazard detection, coded the sample code, and coding for the buffers. 5-9 pm. All 3 attended.
Wednesday November 23, 2011- Code and Debug on Skype and Google Docs 4-7 pm. All 3 online.
Friday November 25, 2011- Code and Debug on Skype and Google Docs 5-8 pm. All 3 online.
Monday November 28, 2011- Testing code and continue debugging, Worked on Power point slides, and formatting output. 5-10 pm. All 3 Attended.
Tuesday November 29, 2011- Code and Debug on Skype and Google Docs 8-11 pm. All 3 online.
Wednesday November 30, 2011- Fixed last few errors in code. Final Report. Power point slides. 6-10 pm. All 3 Attended.
Hours Meet So Far Together: 33
Image hosting by Tinypic.com
