4743 Project Template Page

From Ece

Team PWM_Audiophiles

Our goal is to make a wave file player using the FPGA and utilizing pulse-width modulation.

Team Members

James (Ron) Greer – Recorder

Brian McCalebb – Checker

Eric Tramel – Coordinator

Phase 1

Introduction

Pulse-width modulation makes it is possible to encode an analog input digitally or use a digital signal to control an analog device. This means that pulse-width modulation can also be used to play wave files. A wave file is an uncompressed audio file. The header of the file contains necessary data, such as the bit rate, sample rate, etc. Using pulse-width modulation, a device can be developed that can process this digital data and produce an analog output in the form of audio.

Concept

If a wave file is 44.1 kHz and 8 bits/sample, then the data can be fed to an op amp to boost the signal. From there, the boosted signal can be sent through a headphone converter to a speaker. The concept is that pulse-width modulation can be used in place of an analog-to-digital converter if the sampling is fast enough. Specifically, digital audio with 44.1 kHz audio at 8 bits/sec will be used.

Proposed Work

1. A memory interface will be implemented to store and retrieve multiple wave files (tones).
2. The keyboard interface will input a keypress from the user, and setup the memory stream from the memory interface to the signal processing module.
3. The signal processing module will interpret the data from memory and convert it to a PWM signal.
4. An op amp/external power module will take the pulse-width modulated signal and output it at a higher level to sufficiently drive a powered (or un-powered) speaker.

Required Parts

• Operational amplifier
• Headphone converter
• Spartan III development board (Also utilizing the onboard memory capability of the Digilient Spartan III board)
• External power supply for Op-Amp

Expected Deliverables

Using the parts listed, we will use the keyboard to stop, play, pause, rewind, and fast forward the waveform in the stored interface.

Phase 2

Introduction

Pulse-width modulation makes it is possible to encode an analog input digitally or use a digital signal to control an analog device. This means that pulse-width modulation can also be used to play wave files. A wave file is an uncompressed audio file. The header of the file contains necessary data, such as the bit rate, sample rate, etc. Using pulse-width modulation, a device can be developed that can process this digital data and produce an analog output in the form of audio.

Concept

If a wave file is 44.1 kHz and 8 bits/sample, then the data can be fed to an op amp to boost the signal. From there, the boosted signal can be sent through a headphone converter to a speaker. The concept is that pulse-width modulation can be used in place of an analog-to-digital converter if the sampling is fast enough. Specifically, digital audio with 44.1 kHz audio at 8 bits/sec will be used.

Proposed Work

1. A keyboard interface will be developed that will receive input from the keyboard. The input received will determine which function (play, stop, rewind, fast-forward, or pause) will be performed on the wave file.To be developed by: Brian McCalebb
2. A memory interface will be used that retrieves a stored wave file from memory and transfers the data to the FPGA.To be developed by: Ron Greer
3. The signal processing module will interpret the data from memory and convert it to a PWM signal.To be developed by: Eric Tramel
4. The speaker module will take the pulse-width modulated signal and output it at a higher level to sufficiently drive a powered (or un-powered) speaker. This is a minor module, so it is considered to be a sub-module of the signal processing module.

Modules

• Keyboard Interface
  • The keyboard will interact with the memory to play, stop, pause, fast-forward, or rewind the wave file. Certain key presses from the keyboard will be converted to opcode to be sent to the memory interface. The breakdown for keys and opcode is shown in the table below.
  • Input(s): key press
  • Output(s): opcode
  • Verification: To verify that this module works properly, the generated opcode will be displayed on the seven-segment display to be sure it corresponds to key pressed.

• Memory Interface
  • The memory interface will contain the stored wave file. Upon receiving the opcode from the keyboard module, the memory interface will feed the appropriate sample to the signal processing module, as well as a “sample_ready” signal. The “sample_ready” signal will notify the signal processing module that a sample is ready to be processed. The memory will be preloaded with the wave file using a combination of Digilent's Adept Suite and Digilent's MemUtil utility.
  • Input(s): clock signal, opcode from keyboard module
  • Output(s): sample, “sample_ready” signal
  • Verification: To verify that this module works properly, small known portions of the memory contents will be compared against hardcoded values in the module and leds will act accordingly if the information was read properly at the proper location.
• Signal Processing Module
  • This module will receive an 8-bit sample from the memory and a “sample ready” signal. Upon receiving them, the module will convert the sample into a pulse-width modulated signal.
  • Input(s): clock signal, sample from memory, “sample_ready” signal
  • Output(s): pulse-width modulated signal
  • Verification: A voltmeter will be connected to the output to verify that a signal that is proportional to the original signal is being generated.
• Speaker Module
  • Although it is being outlined separately, the speaker module is actually a sub-module of the signal processing module. It will receive the pulse-width modulated signal from the signal processing module and pass it through an op-amp and out to a speaker.
  • Input(s): PWM signal from signal processing module
  • Ouput(s): audio
  • Verification: If this module is working properly, audio should be heard.

Required parts

• Operational amplifier
  • Part number: LM386
  • Datasheet: LM386
  • Available at: [1]
  • Price: $1.39
• Headphone converter (We will be using one that we already have on hand)
  • Part number: CP-2506-ND
  • Available at: [2]
  • Price: $0.41
• 256Kx32 SRAM
• Available at: (on Spartan-3 board)
• Spartan-3 development board
  • Datasheet: [3]
• 9V battery
  • Available at: [4]
  • Price: $3.27
• 9V Battery Connector
  • Part number: 270-324
  • Available at: [5]
  • Price: $2.59

Expected Deliverables

Using the parts listed, we will use the keyboard to stop, play, pause, rewind, and fast forward the waveform in the stored interface. The user will be able to hear an audio signal from this waveform.

Phase 3

Review of Proposed Work

1. A module to read input from a keyboard must be implemented. Developer: Brian McCalebb
2. A module to read a waveform from memory and based on input from the keyboard interface must be implemented. Developer: James (Ron) Greer
3. A module to output the PWM signal based on an input signal must be implemented. Developer: Eric Tramel

The following images are to be used as a general schematic of how the logic modules are implemented (click to zoom).

Module Descriptions

• Keyboard Module (keyboard.vhd)
  • This module utilizes the ps2core.vhd and ps2_decode.vhd from the Pong lab.
  • This module has two inputs: ps2_data, ps2_clock and one three bit output: opcode
  • (See Table I from Phase II for opcode definitions)
• Memory Module (mem.vhd)
  • This module has three inputs: opcode (3 bits,clk,memory interface (takes 15 input lines) and two outputs: Sample (8 bits), Sample_Ready
• PWM Module (PWMDeclock.vhd, regStepper.vhd, PWMtop.sch)
  • Sub-Modules regStepper: This module takes the PWM clock rate and divides it by four. This module provides the clock signal for the sample register. The slower clock rate allows us to update the sample register only once every 256*4 cylces of the PWM clock.
  • PWMDeclock: This module takes the original 50MHz clock signal and cuts it in half for use in the PWM module (to 25 MHz).
  • Top Module: This module will take a sample (on the next_sample line), which is a 1 byte representation of a voltage level of a waveform, and load it into a sample register when the sample_ready line goes high. At this point, the PWM module uses this sample as a source for producing a PWM signal. A counter is implemented which will count up from 0 to 255, representing each step a byte sample can represent. The value of the counter is compared against the sample, and so long as the counter value is lower than that of the sample, we will output a high signal. This will translate into our PWM signal. So, each period of our PWM signal is split up into 256 divisions. The PWM signal will repeat 4 times for every 1 signal, so, the sample register should be updating at (approximately) 24.414 KHz in actual practice.

Expected Deliverables

The expected deliverables have not changed since Phase II but it should be noted that an Op-amp will be used for amplification of the audio signal, and that considering this implementation is a matter of just hooking up the opamp, this was not considered a separate module. A speaker will be driven by an op-amp, which will get it's signal from the PWM module listed above.

Phase 4