Better Late Than Never
From Ece
Contents |
The Team
- Tyler Wilkinson
- Mitch Witcher
- Josh Hall
Design Overview
We have allowed for a 4 bit op-code, making 16 instructions possible on this processor. Also, our registers are allotted a 4 bit name, producing 16 total registers. Each register will hold 2 bytes worth of data. This means that each byte of the register must be changed separately using the “lui” and “li” commands.
Our RISC processor will be simulated using the C++ language.
Instruction Format
R-Format
| Opcode | Reg A | Reg B | Reg C |
|---|---|---|---|
| 4 Bits | 4 Bits | 4 Bits | 4 Bits |
I-Format
| Opcode | Reg A | Reg B | Signed Immediate |
|---|---|---|---|
| 4 Bits | 4 Bits | 4 Bits | 4 Bits |
J-Format
| Opcode | Reg A | Immediate |
|---|---|---|
| 4 Bits | 4 Bits | 8 Bits |
Instruction Set
| Name | Mnemonic | Operation | Opcode | Format |
|---|---|---|---|---|
| Branch Less Than | blt | If(R[ra] < R[rb]) PC=R[rc] | 0000 | R |
| No Operation | nop | PC = PC + 1 | 0001 | J |
| Jump and Link Register | jalr | [ra]=PC+1, PC = R[rb] | 0010 | I |
| Store Word | sw | M[R[ra]+Imm.]=R[rb] | 0011 | I |
| Load Word | lw | R[ra]=M[R[rb]+Imm.] | 0100 | I |
| Load Upper Immediate | lui | R[ra] = regA, Imm | 0101 | J |
| Load Immediate | li | R[ra] = regA+1, Imm | 0110 | J |
| Set Less Than | slt | R[ra]=(R[rb]<R[rc]) ? 1:0 | 0111 | R |
| Add | add | R[ra]=R[rb]+R[rc] | 1000 | R |
| Add Immediate (mov) | addi | R[ra]=R[rb]+Imm | 1001 | I |
| Subtract | sub | R[ra]=R[rb]-R[rc] | 1010 | R |
| Subtract Immediate | subi | R[ra]=R[rb]-Imm | 1011 | I |
| Multiply | mul | R[ra]=R[rb]*R[rc] | 1100 | R |
| Divide | div | R[ra]=R[rb]/R[rc] | 1101 | R |
| Or | or | R[rc] | 1110 | R |
| Exclusive Or | xor | R[ra]=R[rb]⊕R[rc] | 1111 | R |
Tasks
| Name | Tasks |
|---|---|
| Team | Web Page Updates / Final Report / Power Point Presentation |
| Josh / Mitch | Design Hazard Detection Unit |
| Josh / Tyler | Assemble Control Unit |
| Mitch | Assemble Datapath / Code Control Unit |
| Josh | Code Datapath / Code Hazard Detection Unit |
| Tyler | Design Datapath / Code Forwarding Unit |
Meetings
March 23, 25, 29
April 14, 18, 20
