High-speed PCB Design

From Ece

Project Requirements

1. PCB must be four layers.
2. Signals routed on the top layer.
3. Layer 2 is the ground plane.
4. Layer 3 is Vcc.
5. Layer 4 is a signal layer with wide traces for Vtt.

Test Traces

1. One long, straight trace for measuring the characteristic impedance. Each end should have an SMA connector.
2. One long, straight trace with 4 vias to the bottom layer for measuring the impact of the vias on the characteristic impedance. The length should be the same as the previous trace. Include SMA connectors on both ends.
3. One long, straight trace with a 0603 pad in the middle of the trace for a resistor or capacitor to measure reflections. One end of the pad is connected through a via to the ground layer. Include SMA connectors on both ends.
4. One long, straight trace with SMAs on both ends. A second trace should run parallel to this trace with both ends connected to SMAs. Each side should also have a pad for terminating resistors. The trace should be about an inch away from each other at the ends. The second trace should turn towards the first trace with 90 degree bends and be routed very close to it for most of its length. This setup will allow for measuring crosstalk effects between two traces.

Serializer

1. The active part of the design will be a 4:1 serializer.
2. An external clock will connect to the PCB through an SMA. I believe the clock is single ended (not differential).
3. All signals will be differential with the exception of the input to the fanout chip.
4. The first chip should be a fanout of chip of at least 1:4, but preferably 1:5.
5. Two clock outputs will be routed to one XOR gate, and two other clock output will be routed to another XOR gate. The two XORed output will then be input to another XOR gate. The output of this final XOR gate will be connect to SMAs.
6. On Semiconductor has the chips needed for the project.

Power System

1. Banana clip connectors should be used to the PCB.
2. Have two 0402 bypass capacitors per chip located nearby each chip (bottom of the PCB is fine).
3. Have one 0603 per chip (4 total for the board) located anywhere on the PCB.
4. Have one larger bypass capacitor anywhere on the board.
5. Vtt can be routed on the bottom layer using very thick traces.
6. You will need to decide the values for these capacitors.

Team Member Responsibilities

You can list here the responsibilities of each team member.

PCB Manufacturer

You need to decide which PCB manufacturer you will be using. You can list here a link to their web site, pricing, and other details of their services.

Advanced Circuits

• Board thickness: 0.062"
• Layering information
• Manufacturing tolerances
• Pricing as of 10/17/06: 3 boards for $66/board w/ solder mask and silkscreen
• Trace tweaking not available unless willing to pay $$$$$$$$$$$$$$$$$$$$$$$$$
• 5 day turnaround time
• Other useful available tips from Advanced Circuits, click here

Software

The team will be using Layout Plus to design the PCB. Layout Plus is apart of the Cadence PSD 15.0 suite.

• A Good tutorial for using Layout
• OrCAD design flow tutorial

Layout Details

You can list here the details of the PCB layout such as board dimensions, footprint information, etc.

• All footprints used for the project can be found here (Save As).
  • Clock Distribution Chip - SOIC-20
  • XOR Gates - SO-8

Layer Order

Here is an ASCII representation of our board with the appropriate layer order and thickness specifications according to Advanced Circuits.

-----------------------------------------
|            Cu = 1.35 mils             | (SIGNAL)
-----------------------------------------
|       Prepreg 2116 = 4.8 mils         |
-----------------------------------------
|       Prepreg 2116 = 4.1 mils         |
-----------------------------------------
|            Cu = 1.35 mils             | (GND)
-----------------------------------------
|            Core = 39 mils             |
-----------------------------------------
|            Cu = 1.35 mils             | (VCC)
-----------------------------------------
|       Prepreg 2116 = 4.1 mils         |
-----------------------------------------
|       Prepreg 2116 = 4.8 mils         |
-----------------------------------------
|            Cu = 1.35 mils             | (VTT)
----------------------------------------- 

Based upon 1 oz. Cu

Trace Width Calculation

Verified Lee's calculations he sent through email according to the microstrip equation found in Dr. Davis' book (eq. 27) and the information posted above under layer order.

Trace width:
w = 14.76 mils needed for 50 ohm lines

Parameters:
Z0 = 50 ohms
t = 1.35 mils
h = 8.9 mils
εr = 4.5

Via Impedance Calculation

Calculated the diameter of the via, from the equations found in Dr.Davis' book (eq. 8 & 9) and from the information posted under the PCB manufacturer(Manufacturing tolerances)

For impedance(Z) = 50ohms

Hole Size (from datasheet) = 0.010"

Clearance diameter(dc) = 0.0349"

Diameter of the hole to be drilled = 0.020"

Pad diameter(dp) = 0.020".

Therefore the size or the diameter of the hole to be drilled is 0.020" and surrounding it is the clearance diameter 0.0349", which means adding a clearance of 0.0174" on both the sides of the via.

Materials

Active Components

1. Clock Distribution Chip - 3.3V ECL 1:5 Clock Distribution Chip
2. Hi-speed XOR Gates - 3.3V / 5V Differential 2-Input XOR/XNOR

Connectors

SMA Connectors: 16

    Amphenol 901-144-8RFX PCB Mount SMA Connector Mechanical Drawing

Power Connectors: 3 (Power, Ground, Termination)

    Johnson Component Vertical Test Jack Drawing

Capacitors

1 Large bypass capacitor - 1 total:

Large bypass capacitor (10uF) datasheet

1 0603 capacitor per chip - 4 total:

4 0603 capacitor (0.1uF) datasheet

2 0402 capacitors per chip - 8 total:

4 0402 capacitors (0.01uF) datasheet

4 0402 capacitors (0,047uF) datasheet

Bill of Materials

Ordering Information

• On Semiconductor: (Order Received 11/3/2006)
  • MC100LVEL14: 3.3V ECL 1:5 Clock Distribution Chip - Confirmation
  • MC100EP08: 3.3V / 5V Differential 2-Input XOR/XNOR - Confirmation

• Advanced Circuits:
  • PCB: 4-Layer - Invoice

• Digikey Order:
  • Order Information - Invoice