Circuit Images: Most of electronics is straightforward. Circuits are devised at the schematic level and then constructed as a pattern layout of transistors and interconnects, to form an 'integrated' circuit at the layout level. The layout design consists of regular "Manhattan" patterns of diffusion, oxide, polysilicon, and various levels of metal interconnect to form a nice and neat if somewhat abstract design. As an example, here are (1) the schematics and (2) the checkplot for a wide-swing folded-cascode operational transconductance amplifier (OTA) used in one of our test circuits. It consists of two parts, (1) a Sackinger bias frame with startup circuit and (2) a long-tailed transistor coupled pair with a "folded" output load, as shown below:

In this case the V+, V- inputs can be taken off either end of the layout, or off the bottom (as viewed).

Online Course Information:

subject to minor modifications and wholesale changes

• ECE 3413 Electric Circuits
• ECE 3424 Intermediate Electronic circuits
• ECE 3434 Advanced Electronic Circuits
• ECE 3183 Linear EE Systems
• ECE 3283 Electronics, Mechatronics and Haptics
• ECE 4853/6853 Fiber Optic Systems and Optoelectronics
• ECE 4243 Intro to Physical Electronics
• ECE 4273/6273 Microelectronic Devices
• ECE 8223 Analog IC Design
• ECE 6990 RF Systems Design

More test circuits:

Interest trivia: Mathematics

Henon logistic equation: H(x,y) = x^2 - ay + c,x). It is a fractal. And here is its map.