ECE3243 Electronic Circuits I


Policies/Syllabus

Coverage: Electronics is the principal force behind what is usually defined as Electrical and Computer Engineering. Circuit components are non-linear, which implies that they subscribe to mathematics analysis of some detail, as may be reflected by the subject textbooks. However, much of the mathematics detailing can be circumvented by good descriptors and approximations, which is the approach that we will use to develop electronics as a design environment.

Electronic components are as varied as their applications. They can range from items the size of a coffee can for the control of power grids and diesel locomotives to components so miniscule that several hundred can be comfortably fitted and integrated on the cross-section of a human hair, although we have not found any necessity to do so.

Electronics is nominally simple because it takes the concepts of linear circuits as represented by the prerequisite courses and extends them into the realm of non-linear components and transfer devices. Generic components are generally categorized as 'diodes' and 'transistors'. So if you have a reasonable perspective on linear circuit analysis, it should be an easy transition to the powerful and deliberate science of electronics. The SPICE simulation utility will be used extensively to perceive the effects of non-linear devices embedded within a circuit, as well as assess a circuit as an application entity. A good acquaintance with the SPICE (pSPICE) utility is essential to advancement of your skills and perspectives of electronic circuits, so be sure to make use of the tutorials indicated on this site if you need to be refreshed in the use of this utility.

The operational aspects of this course are represented by the following documents. On the first day of class you will receive them as hardcopies but otherwise they are accessible at the following links:

  1. Certifications and policy
  2. Syllabus: summer 2004

Perspective

This is an upper level course, and you should expect that it be more demanding than a lower level course. So you might need to check out the info site exegesis which will indicate more about the skills and utilities that you will need to command in order to undertake the tasks associated with this course.

Email List

If you have not received messages via the class email alias then you should ping the environment or adjust your communication paths forthwith. Email is the avenue for which homework assignments, administrative requirements, corrections, updates, and vicissitudes with be passed to you.

Homework:

Be advised that much of the analytical and pSPICE homework is generated locally and therefore will be in a somewhat dynamic state. Homework exercises from past editions of this course are not likely to be valid, and if solutions from old homework appear, it will imply that the question of academic dishonesty needs to be reviewed, which your kindly professor would rather not have to do.

Electronic submission: Effective fall 2003, all SPICE homework is to be submitted electronically through the submission path used by the ECE department. as a pdf file on or before the due date.

Warning: Be concise. There are penalties for excess detail and they add up quickly. It is incumbent upon students to practice report techniques as much through the homework environment as in more formal situations.

Due dates for electronic homework are the same as for hardcopy homework.

And so are the late penalties.
  1. Diode analytical exercises
  2. Diode spice exercises
  3. BJT analytical exercises
  4. BJT spice exercises
  5. FET analytical exercises
  6. FET spice exercises
  7. MOSFET device spice exercises
  8. nMOS logic ckt exercises
  9. CMOS logic ckt exercises
  10. Logic circuits via Spice analysis
  11. High-speed digital electronics: -> (CMOS spice transmission line exercise)

pSPICE tutorials

If for some reason you are not secure with the pSPICE utility, then you would be well advised to sit down forthwith and walk through the identified tutorials. They are slow and patient, and will help to get you started and into the more important aspects of pSPICE needed for expert circuit simulations:

  1. Tutorial #1: Getting Started - pSPICE Schematics editor.
  2. Tutorial #2: Execute pSPICE and invoke the PROBE (output display) window.
  3. Tutorial #3: Set up parametric sweep option. Example: Maximum power transfer theorem via pSPICE.
  4. Tutorial #4: Load MOSIS parameters into generic MOS part. Example: I-V charactersitics for short-channel transistor.

If you do not have a copy of the student version of pSPICE you should be able to find one at the ORCAD/Cadence (updated) site. It should be a straightforward download and install. I=And if for some reason this copy is not friendly (sometimes also called 'vendor improved') then you can obtain an old reliable copy at pspice(olde). However I would expect it would be advantageous to download the shiny new version.

Supplemental materials:

  1. Diode and diode ckts: formulae. This page also serves as a cover sheet for quiz on diodes and diode circuits. There aren't many formulae. If you should want to program them into a calculator, by all means do so..!
  2. Summary and characteristics of the topologies for single-transistor small-signal linear transfer circuits. Nice math, but more exact than can truly be realized.
  3. BJT/FET circuit summary of the fundamental topologies for small-signal transfer in design format (design by inspection). This page serves as the principal cover sheet for quizzes on BJT and FET single-transistor circuits. If you should want to program these equations into your calculator, that's fine, but the intent is that you commit these relationships to a fast action mode for quick, rough design assessments. And therefore your calculator will become more of an impediment than an asset.
  4. Professor's notes on BJT circuit analysis. This material extends and/or replaces the coverage given by the textbook and cuts to the chase in the methods of analysis for transistor circuits, essentially reducing the process to a fast rough analysis of circuits by inspection.
  5. FET circuit summary of (1) the basic topologies for small-signal transfer, design format (for design by inspection), and (2) relationships for spice model parameters for levels -2 and -49 (level-7).
  6. Professor's notes on logic circuit analysis. This material extends and/or replaces the coverage given by the textbook, which struggles to make a good clean coverage of this sub-subject area, particularly with the CMOS technology.
  7. Synopsis of mathematical analysis for logic ckts: formulae. This page also serves as a cover sheet for the quiz on basic logic circuit analysis and design. If you should want to program these carefully cultured formulae into a calculator base for your arthropodic convenience, by all means do so.
  8. Exam cover sheet This is a much compacted form for all of the synopses above. You may have to squint in order to read it.
  9. select homework solutions Double click

Misc