ECE7000: self-study
Analog IC design for RF communications

New course, new page. And my apologies. It is a patch.

Some of the hyperlinks may not be yet active.

Bits and pieces

Simulation platform: Simplest option = pSPICE, which is located at the ORCAD/Cadence (updated) site. Should be a straightforward download and install.

SPICE parameters: Available from the MOSIS fabrication service.

Getting started with pSPICE:

  1. Tutorial #1: Getting Started - pSPICE Schematics editor.
  2. Tutorial #2: Execute pSPICE and invoke the PROBE (output display) window.
  3. Tutorial #3: Set up parametric sweep option. Example: Maximum power transfer theorem via pSPICE.
  4. Tutorial #4: Load MOSIS parameters into generic MOS part. Example: I-V charactersitics for short-channel transistor.

Email

Given the distance environment, it will be essential to operate as much as possible electronically, with email being the primary vehicle. I will need your email address so that I can formulate a group alias.

And as much as possible, assignments should be handled electronically via use of common PC tools.

Policy/Syllabus

Apparently the syllabus will be derived from the textbook for the course:

Gray and Meyer, "Analysis and Design of Analog Integrated Circuits"

and I am sure will be subject to minor adjustments and wholesale changes.

  1. Information and directives
  2. Syllabus?
  • The CMOS model (condensed notes on BSIM3v3) used for most CMOS small-feature-size anaysis. Even though the document is a good and nicely condensed exposition, I would not recommend that you get too involved with it. Seems that 10-12 UC-Berkeley graduate students derived their PhD dissertations from this model. So it likes to impress you with mathematics and second-order effects, much more than is necessary.

    If you really would like to punish yourself, the parent document for BSIM3V3 from which these notes were developed is located at UCB (UC Berkeley) BSIM3V3 manual and is not a particularly friendly document.

    Or if you should want to confer with the latest BSIM3V4 model it is locatd at UCB Bsim3V4 documentation

    Egad!

    Rules of Engagement

    The accomplishment of this self-study will be indexed by a Score/Completion table, indicating your progress in terms of completion of the homework problem sets.

    The problem sets are the only index that can be employed for a self-study environment. So if you are to receive credit for this directed individual study course, you must keep pace.

    The self-study, which is a review of a set of course notes on Analog IC Design for RF communications, is undertaken at the request and discretion of the student group that has signed up for this patch course. The review can be done by group sessions or it can be undertaken independently. How you undertake this process is your choice, but it one to which you must adhere, without lapse, if you are to receive credit.

    Homework sets are due each Friday, not later than 9:00.00PM. If late, they will be diminished by 20%/day. After 5 days, (e.g. by the following Wed 9PM) they will be worth 0% and will not be reviewed. Generally, the homework sets will be reviewed for completion and accuracy on Saturday or Sunday. Homework sets will not be returned. Indication of receipt and degree of completion and accuracy will be indicated by an entry in the score table.

    Homework must be CONCISE. One of the necessities of the engineering profession is that reports be to the point, and homework problem sets are no exception. As example, here is a copy of what would be expected of the first homework set. (Prob Set #1, pspice version)

    Note that only the salient features of the problem exercise are identified: (1) it does not overload the analytical explanations, and (2) it includes only essential slices of the SPICE output.

    Extra pages and overhead will diminish value of the homework at a rate of -1 point per excess page (50 lines or 9 inches of space). Since homework sets will only be rough-scanned, and therefore valued only in terms of a few points, then excess overhead can seriously diminish value. (e.g. the first HW set point count value is 22 pts). -So be forewarned

    In order for this self-study to be credited as an academic course appropriate to a baccalaureate degree the following scale is assumed:

                A:         90%     score or better
                B:         80%     score or better but < 90%
                C:         70%     score or better but < 80%
                ..etc


    where the percentage 'score' will be defined by the score table. It would be preferred that all of the participants score at the high end. But the progress and score is strictly the choice of the student, not that of the supervising professor, since this is by fact a self-study course and not a programmed course.

    Outlooks:

    1. Getting acquainted with CMOS design and with the BSIM3V3 model. This is an exercise that may help get you acquainted with the use of pSPICE as used for a typical (AMI 0.5u) commercial CMOS technology. The AMI 0.5u technology is the technology of choice for most university IC design classes, since designs can be submitted under the MOSIS MPEP program available to universities. As you will see, should you access this file, this particular exercise was used as a 'startup' exercise under the ECE8223 Analog IC Design class, and involves a few tests on a single transistor.

    2. Screen capture and documentation techniques of pSPICE results for electronic submission. Should you access this file you will find that it was another one under the ECE8223 class, intended to provide the insight that is necessary for electronic submissions. It's circuit charter was to identify the tests necessary to assess the effects of the capacitance at a node within a circuit.

      It also provides the partiipant an acquaintance with some key skills for which the pSPICE parameterization option is awakened.