ECE8223 is a one-semester course focused on CMOS analog integrated circuit design in advanced MOS technologies. It integrates the process of analysis, simulation and layout techniques that define design processes for analog design. System orientation includes the mixed analog-digital (MAD) design environment. The course is project oriented.
As a caveat to design in advanced MOS technologies the course is strongly oriented toward simulation. Although the course may be somewhat adaptive, depending on available toolsets, the expected working environments with which the participant needs to acquire familiarity are those of pSPICE and Excel. Collateral environments which are of interest and benefit are the HSPICE and MWAVES tools, and the Virtuoso environment within the CADENCE toolset. The principal test platform will be the student version of pSPICE, since it is quick, simple, and friendly, and will suffice for most of the cells that we investigate. Larger circuits will make use of either the licensed version of pSPICE (PSPICE_AD, professional version 14) or the hSPICE/Mwaves platform. We also make use of the Cadence/Virtuoso platform for development of projects.
The principal analytical and approach model will be SPICE level 2. The principal simulation model will be SPICE level 49 (level 7 under pSPICE) otherwise known as BSIM3v4. Most parameter files will be downloads from the MOSIS site, and it is desired that the project be defined in terms of a systematic design analysis and a MOSIS-ready design (CIF) file.
A project is planned and expected. It may be an individual project or a team project (maximum team size = 2). It is intended that the project be prepared as an applications design for presentation as a netscape poster session using html language and the powerpoint environment.
A qualification of the above plan may come to pass if we should find this course in the mode as a distance learning (video) course, as often is the case. Remote sites may not be as robust as the MSU site, for which we have need to adjust to the constraints of the remote site.
The syllabus is derived primarily from the textbook for the course: D.A. Johns, K. Martin, "Analog Integrated Circuit Design" and extensive notes and supplemental materials. It is an adaptive schedule, subject to adjustments and changes. The key protocol documents are located at:
If you are unsure or need to be refreshed with the pSPICE you might take a few moments and walk through the following tutorials. They are slow and patient, and will help to get you started and into the more important aspects of pSPICE that are needed for expert circuit simulation.
Another URL with information about SPICE is located at Online SPICE resources
·
Homework submissions should be submitted using MSWord
or an equivalent utility to capture and pre-format the results and analysis.
This document must be then printed into a .pdf file . The .pdf file
format is the only acceptable submission form, since the only utility that has
markup capability is the acrobat reader.
Files are submitted to the class homework (and other) folders found under the
ECE intranet link to the ECE8223 course. Your intranet ID and password
give you access to these folder and the files within that are identified by
your ID.
·
· Specials: IO Standards in Design, Muthukumar Nagarajan, Cypress Semiconductor
· HOMEWORK EXERCISES:
1. Assignment #E-1 Getting Started -Excel: This exercise will introduce you to the Excel utility as a working platform for analytical calculations and will serve as a basis template for use in later exercise.
2. Assignment #S-1 Getting Started -Pspice: This exercise will introduce you to the pSPICE utility and will serve to create templates of the nMOS and pMOS devices that will be needed for subsequent circuit constructs.
3. Assignment #ES-2 Templates -Pspice: This exercise will introduce you to one of the templates that are necessary for making device assessments as needed for analytical anlog IC design. It takes advantage of both the pSPICE utility and the Excel utility to accomplish basic design analyses.
4. Assignment #ES-3 Pspice/Excel and amplifier analysis: This exercise will introduce you to the style of analysis necessary to assess an analog design. In this case it is applied to a circuit primitive, the CS (common-source) configuration with active (current-source) load.
5. Assignment #ES-4 Pspice/Excel and high-performance (cascode) analysis: This exercise will introduce you to the process necessary for the assessment of a high-performance design, in this case a cascode current mirror.
6. Assignment #ES-5 Pspice/Excel and analysis of the Source-coupled pair: This exercise is one of a series of tests on this important subcircuit. In this case we assess the transfer gain vs Ix for different type loads.
7. Assignment #ES-6 Pspice/Excel and analysis of the Source-coupled pair: This exercise is one of a series of tests on this subcircuit. In this case we assess the performance characteristics for different current levels.
8. Assignment #ES-7 Pspice/Excel and analysis of the Source-coupled pair, with current source: This exercise is a long involved exercise, mostly with manipulation of the spreadsheet environment to evaluate the input common-mode range (CMR).
· PROJECTS
1. Analytical/pSPICE project 1 Project Guidelines This is one of the benchmarks, for which you are invited to exercise a little thought and a significant level of innovation. You are expected to apply the skills and insights that you have developed to date to define and execute a project that has some extrinsic value.
2. Analytical/pSPICE project 2 (final) Guidelines This is a second one of the semester benchmarks, for which you apply most of the techniques you have learned during the semester to accomplish an OTA design in nMOS or pMOS form and put these design techniques to test.
· PROJECTS LEXICON: Yours and those of your classmates:
1. Analytical/pSPICE project 1 Subcircuit Projects, Spring 2006
2. Analytical/pSPICE project 2 OTA Projects, Spring 2006